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Zhengshen Zhang
TravisZhang
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TravisZhang/dit-ddpm_calvin_finetune_vanilla_wo-state_ds_lr5e-5_fp32_gifs
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TravisZhang/dit-ddpm_calvin_finetune_vanilla_wo-state_ds_lr5e-5_fp32_gifs
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TravisZhang/dit_calvin_finetune_vanilla_wo-state_ds_lr1e-4_fp32_infer-32_buck-2000_logs
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TravisZhang/dit_calvin_finetune_vanilla_wo-state_ds_lr1e-4_fp32_infer-32_buck-2000_logs
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TravisZhang/dit_calvin_finetune_vanilla_state_ds_lr1e-4_fp32_acc-rel-act-chunk-tcp_logs
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TravisZhang/pali_dit_calvin_finetune_vanilla_wo-state_ds_lr2e-5_tcp-rel_bs8_logs
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TravisZhang/pali_dit_calvin_finetune_vanilla_wo-state_ds_lr1e-5_tcp-rel_infer-32_logs
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TravisZhang/dit_calvin_finetune_vanilla_state_ds_lr1e-4_fp32_tcp-rel_logs
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TravisZhang/pali_dit_calvin_finetune_vanilla_wo-state_ds_lr1e-5_tcp-rel_logs
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TravisZhang/dit_calvin_finetune_wo-state-pcd_linear-twin-v1_ds_lr2e-5_fp32_logs
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TravisZhang/dit_calvin_finetune_wo-state-pcd_linear-twin-v1_ds_lr1e-4_fp32_logs
Updated
TravisZhang/dit_calvin_finetune_state_pcd_ds_lr2e-5_fp32_logs
Updated