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t5-vit-14-v1

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  1. vitl14_t5small_shunt_final.safetensors +3 -0
  2. vitl14_t5small_shunt_step_10000.safetensors +3 -0
  3. vitl14_t5small_shunt_step_2000.safetensors +3 -0
  4. vitl14_t5small_shunt_step_20000.safetensors +3 -0
  5. vitl14_t5small_shunt_step_30000.safetensors +3 -0
  6. vitl14_t5small_shunt_step_35000.safetensors +3 -0
  7. vitl14_t5small_shunt_step_4000.safetensors +3 -0
  8. vitl14_t5small_shunt_step_6000.safetensors +3 -0
  9. vitl14_t5small_shunt_step_8000.safetensors +3 -0
  10. vitl14_t5small_shunt_vanilla_final.safetensors +3 -0
  11. vitl14_t5small_shunt_vanilla_step_10000.safetensors +3 -0
  12. vitl14_t5small_shunt_vanilla_step_2000.safetensors +3 -0
  13. vitl14_t5small_shunt_vanilla_step_20000.safetensors +3 -0
  14. vitl14_t5small_shunt_vanilla_step_30000.safetensors +3 -0
  15. vitl14_t5small_shunt_vanilla_step_35000.safetensors +3 -0
  16. vitl14_t5small_shunt_vanilla_step_4000.safetensors +3 -0
  17. vitl14_t5small_shunt_vanilla_step_6000.safetensors +3 -0
  18. vitl14_t5small_shunt_vanilla_step_8000.safetensors +3 -0
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